| PART |
Description |
Maker |
| FH28D-50S-0.5SH05 FH28D-50S-0.5SH07 FH28D-50S-0.5S |
0.5 mm Pitch, 2.55 mm above the board, Flexible Printed Circuit & Flexible Flat Cable ZIF Connectors
|
Hirose Electric
|
| SM803020 SM803020UMY SM803020UMYR A18 B20 B12 A44 |
Flexible Ultra-Low Jitter Clock Synthesizer
Flexible Ultra-Low Jitter Clock Synthesizer
|
Micrel Semiconductor
|
| AD9550 AD9550_PCBZ AD9550BCPZ AD9550BCPZ-REEL7 AD9 |
Integer-N Clock Translator for Wireline Communications
|
Analog Devices
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| NB7V58MMNHTBG NB7V58MMNG NB7V58MMNTXG |
1.8 V / 2.5 V / 3.3 V Differential 2:1 Clock / Data Multiplexer / Translator with CML Outputs
|
ON Semiconductor
|
| NB7V72MMNHTBG NB7V72MMNG NB7V72MMNTXG |
1.8V / 2.5V Differential 2 x 2 Crosspoint Switch with CML Outputs Clock/Data Buffer/Translator
|
ON Semiconductor
|
| NB7V586M NB7V586MMNG NB7V586MMNR4G |
1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer / Translator
|
ON Semiconductor
|
| NB7L585MNR4G NB7L585MNG |
2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator
|
ON Semiconductor
|
| NB7L585R NB7L585RMNG NB7L585RMNR4G |
2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer / Translator
|
ON Semiconductor
|
| ICS83021AMI ICS83021AMILF |
IC,1 TO 1, 2.5V,3.3 V DIFFERNTIAL TO LVCMOS/LVTTL TRANSLATOR, SOIC-8 PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8
|
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
|
| SI5330A-A00200-GM SI5330A-A00202-GM SI5330F-A00216 |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
|
Silicon Laboratories
|
